F206N - Nios II Slave Board
3U CompactPCIThis product has been discontinued.
The F206N is a 3U CompactPCI card with an onboard Altera Cyclone FPGA and the integrated Nios II soft processor.
- 512 bytes instruction cache and 512 bytes data cache integrated in Nios II
- 32MB SDRAM system memory
- 133MHz memory bus frequency
- 2MB boot Flash
- One RS232 UART (COM10)
- D-Sub connector at front panel
- Data rates up to 115.2kbit/s
- 60-byte transmit/receive buffer
- Handshake lines: full support
- For debugging
- Three 10-pin connectors
- For FPGA-controlled functions
- For use of one additional SA-Adapter
- One receptacle for direct SA-Adapter connection at the front
- Two receptacles for direct connection of long SA-Adapters at the front (instead of short SA-Adapters)
- Different physical layers through SA-Adapters: RS232, RS422, RS485, Ethernet, CAN bus, binary I/O
- Standard factory FPGA configuration:
- Nios II soft processor
- 16Z014_PCI - PCI to Wishbone interface
- 16Z052_GIRQ - Global Interrupt Controller (Nios)
- 16Z052_GIRQ - Global Interrupt Controller (CPU)
- 16Z069_RST - Reset Controller
- 16Z043_SDRAM - SDRAM controller (32MB)
- 16Z045_FLASH - Flash interface
- 16Z025_UART - UART controller (controls COM10)
- The FPGA offers the possibility to add customized I/O functionality. See FPGA.
- 32-bit/33-MHz, 3.3V V(I/O)
- Compliant with PCI Specification 2.2
- Compliance with CompactPCI Core Specification PICMG 2.0 R3.0
- Peripheral slot
- 32-bit/33-MHz PCI
- V(I/O): +3.3V
- Only one slot required on 3U CompactPCI backplane
- More supplementary CompactPCI slots required depending on SA-Adapters
- Supply voltage/power consumption:
- +5V (-3%/+5%), current depends only on mounted SA-Adapters
- +3.3V (-3%/+5%), 500mA typ.
- MTBF: 308,000h @ 40°C (derived from MIL-HDBK-217F)
- Dimensions: conforming to CompactPCI specification for 3U boards
- Single 3U front panel slot for up to two 9-pin D-Sub connectors
- Weight: 165g
- Temperature range (operation):
- Airflow: min. 10m³/h
- Temperature range (storage): -40..+85°C
- Relative humidity (operation): max. 95% non-condensing
- Relative humidity (storage): max. 95% non-condensing
- Altitude: -300m to + 3,000m
- Shock: 15g/11ms
- Bump: 10g/16ms
- Vibration (sinusoidal): 2g/10..150Hz
- Nios sample design for Quartus II development tools
- Flash update tools for Windows, Linux, VxWorks
- Driver software depending on implemented FPGA functions
- For more information on supported operating system versions and drivers see Software.
- FPGA Altera Cyclone EP1C12 (optional EP1C20)
- 12,060 logic elements
- 239,616 total RAM bits
- Logic elements of Nios II soft processor (standard version): approx. 3500
- Functions can be linked to Wishbone or Avalon bus
- Available pin count: 79 I/O lines
- Functions available via I/O connectors
- SA-Adapters can be used to realize the physical lines.
- MEN offers an FPGA Development Package as well as Flash update tools for different operating systems.
- Two 10-pin plugs for onboard connection of two additional SA-Adapters via ribbon cable (on request)
- One 40-pin plug for onboard connection of up to four additional SA-Adapters via ribbon cable (on request)
- Different physical layers via SA-Adapter controlled by FPGA
- 4, 8 or 12HP front panel dependent on number of SA-Adapters ( 8 or 12HP on request)
- One-piece front panel
- Different front panel cut-outs for audio, USB etc.
RS422/485, half duplex, optically isolated, 0°C to +60°CDetails
RS422/485, full duplex, optically isolated, 0°C to +60°CDetails
RS422/485, full duplex, optically isolated, -40°C to +85°C screenedDetails
RS232, optically isolated, 0°C to +60°CDetails
RS232, optically isolated, -40°C to +85°C screenedDetails
CAN bus ISO high-speed, optically isolated, 0..+60°CDetails
CAN bus ISO high-speed, optically isolated, -40..+85°C screenedDetails
8 digital I/O channels, -40..+85°C qualified, no RoHSDetails
RS232, not optically isolated, 0°C to +60°CDetails
Linux FPGA update tool (MEN)
MDIS5 System (and Device Driver) Package (MEN) for Linux.
This software package includes most standard device drivers available from MEN.
Windows FPGA update tool (MEN)
VxWorks FPGA update tool (MEN)
VxWorks native driver (MEN) for 16Z025_UART, 16Z057_UART and 16Z125_UART
MDIS5 System (and Device Driver) Package (MEN) for VxWorks. This software package includes most standard device drivers available from MEN.
Nios-CompactPCI Open Platform FPGA Development Package (MEN) (without Altera Quartus II) (license not included in F206N)