16Z034_GPIO - GPIO Controller
FPGA IP Core
The GPIO controller is a General Purpose Input/Output module with 8 input/output ports.
- Logic elements (Altera Cyclone device family): max. 250 (depending on usage of debouncer inputs)
- Pin count min: 1
- Pin count max: 8
- Wishbone bus interface compliant with Wishbone Specification B.3
- 8-bit data transfer, 66MHz bus frequency
- Supported Wishbone bus cycles
- Single read/write
- Up to 8 general purpose input/output ports
- Optional debouncer for inputs
- Optional open drain functionality
- Interrupt on input signal change (rising and/or falling edge)
- Re-readable outputs
- Generics for all register values
- MEN Driver Interface System (MDIS for Windows, Linux, VxWorks, QNX, OS-9)
- For more information on supported operating system versions and drivers see Software.
MDIS4/2004 / MDIS5 Windows driver (MEN) for 16Z034_GPIO devices
MDIS5 System (and Device Driver) Package (MEN) for VxWorks. This software package includes most standard device drivers available from MEN.
MDIS4/2004 system (and device driver) package (MEN) for QNX, source code. This software package includes most standard device drivers available from MEN.
MDIS5 low-level driver sources (MEN) for 16Z034_GPIO, 16Z037_GPIO and 16Z127_GPIO