16Z126_SERFLASH - Serial Flash Interface
FPGA IP Core
The 16Z126_SERFLASH serial Flash interface is used to connect serial Flash devices to the Wishbone bus via read-only and read/write addressing. The Flash memory can be used to store FPGA configuration images or software applications.
- Logic elements (Altera Cyclone III device family): 630 typ.
- Pin count: 4
- Wishbone bus interface compliant with Wishbone Specification B.3
- 32-bit data transfer, 33/66MHz bus frequency
- Supported Wishbone bus cycles
- Single read/write
- Flash interface
- Standard Flash interface timing
- Up to 24 address bits
- 32 data bits
- 16 MB memory size support